At present, semiconductor memories are used in various devices, including main memory devices of large-scale computers, personal computers, home electrical appliances, mobile phones and the like. Memories that are now dominantly used in the market are flash-EEPROM nonvolatile memories, represented by NAND-Flash memories. Since the flash-EEPROM nonvolatile memories are configured to maintain data even if the power source is turned off and have structures suitable for integration with high density, they are now used in various information devices such as mobile telephones and digital cameras. That is, the flash-EEPROM nonvolatile memories are widely used as storage media for digital cameras, digital video devices, portable personal computer and MP3 music devices, storage media for storing information items of images, moving pictures, sound, games in digital television receivers, or various memory cards (SD cards, MMC cards, MS cards, CF cards and the like). Further, they are also widely used as memories (USB memories) that are compatible with USB as storage media of personal computers and memories of mobile telephones.
The flash-EEPROM nonvolatile memories are mainly divided into NOR memories (NOR flash memories) and NAND memories (NAND flash memories). The NOR flash memory has a characteristic that the number of read/read operations is approximately 1013 making it suitable for use as a storage medium of instruction codes in a mobile device. However, since the effective bandwidth of writing is small, it is not suitable for file recording.
On the other hand, the NAND flash memory has a read characteristic that the access time is approximately 25 μs, which is long, but it can be integrated with higher density in comparison with the NOR flash memory. Further, burst reading can be performed and the effective bandwidth is large. In the write characteristic, the program time is 200 μs and the erase time is 1 ms, which are long. However, since the number of bits that can be simultaneously programmed or erased is large, write data can be taken in by a burst operation and a large number of bits can be simultaneously programmed in units of pages, the effective bandwidth becomes large.
Since the NAND flash memory can be integrated with high density so as to attain a large storage capacity, its use in place of a hard disk has recently been considered. However, there are some restrictions on usage. First, since data degradation occurs due to writing/erasing (programming/erasing), there are restrictions on the number of writable/erasable operations. That is, in the program operation of the NAND flash memory, electrons are injected into the floating gate by applying a high voltage to the gate of a memory cell transistor with respect to the substrate. If the above operations are repeatedly performed, an oxide film around the floating gate of the memory cell transistor is degraded and data is destroyed. In the NAND flash memory now used, the number of writable/erasable operations is approximately 105 and is extremely small in comparison with that of other types of nonvolatile memory. Further, it is predicted that the number of writable/erasable operations will be further reduced with miniaturization in the future processing and multivalue-coding of cells. If the NAND flash memory is used as a memory card or USB memory, it takes a relatively long time to make approximately 105 accesses, thus the NAND flash memory can be used in practice. However, if the NAND flash memory is mounted in a system and used instead of a hard disk, accesses of approximately 105 times will occur in a relatively short period of time.
Further, a restriction of rewriting inhibition is imposed on the NAND flash memory. That is, programming of the NAND flash memory can be controlled only in the direction (the direction of data “1”→data “0”: “0” writing) in which electrons are injected into the floating gate and erasing must be performed when electrons are extracted (the direction of data “0”→data “1”: “1” writing). At this time, generally, programming is performed in page units but erasing can be performed only in block units, comprised of several pages. Therefore, when data of a programmed page is changed, it is necessary to temporarily save the entire amount of data in a block containing the page of the data to be changed into another area, erase the data and then perform the program operation again. In practice, since the number of rewritable/erasable operations is restricted, the program/erase operations are prevented from being excessively performed by writing a to-be-rewritten page into another erased area and managing the same by using a logical-physical conversion table.
As a further restriction condition of the NAND flash memory, page reverse-order programming is inhibited in the NAND flash memory. For example, there is a restriction that programming must be performed in an ascending order from the page address “0” when programming is performed in a block.
When a memory system using the above NAND flash memory is configured, particularly, when a memory system used instead of a hard disk is configured, at present, the memory system is often configured by a volatile RAM for data cache and management information storage and a NAND flash memory for nonvolatile main storage. With the above configuration, since a command (flash cache command) for saving data of the volatile memory area into the nonvolatile memory area is frequently issued from the host side as a countermeasure against instantaneous turn-off of the memory system, it resultantly becomes necessary to add an updating portion of management information (that is hereinafter referred as a management log) into the NAND flash memory.
In the above memory system, it is necessary to extract the newest information from the management log written into the NAND flash memory and reconstruct management information each time the power source is turned on. At this time, it is necessary to grasp the boundary of a storage area of the management log in the memory area indicating a portion of the memory area to which the storage area of the management log extends in the memory area, that is, the range of a valid information storage area.
Further, recently, a configuration is proposed in which a nonvolatile RAM (for example, FeRAM, MRAM or the like) for data cache and management information storage and a NAND flash memory are combined based on the large capacity of the nonvolatile RAM and the various restriction conditions of the NAND flash memory. With this configuration, a problem relating to the management log as described before can be avoided by arranging management information that is frequently rewritten on the nonvolatile RAM. However, it is necessary to grasp data that has been written, that is, one of the pages that has been programmed in the block when the memory system is instantaneously turned off while data is being written into the NAND flash memory.
In “Semiconductor Device containing Flash Memory, Control Method of Flash Memory and Programming thereof”, Jpn. Pat. Appln. KOKAI Publication No. 2004-310268, it is disclosed that storage of newest data having a given data length is additionally provided in a block of the flash memory erase unit. As a concrete example, storage data is searched for while addresses are changed in units of words from the start address of the block to the end address when data rewriting is performed in each erase block unit, and if the searched data items are all set at the logical level “1”, which indicates the erase state, newest data items are sequentially written from the start address. On the other hand, when the searched data is set in the non-erase state, newest data is written from an address value if a derived address value derived by adding a preset numerical value to the address value is smaller than the end address value. On the other hand, if the derived address value derived by addition is larger than the end address value, data of the block is erased and newest data is written from the start address.
Further, in “Semiconductor Memory Device and Blank Page Searching Method thereof”, Publication No. 2005-353171, a method for detecting a blank page in which the entire page is set in a data initial state (erased state) at high speed without reading data in the page in units of bytes is disclosed. As a concrete example, the potential of a bit line is sensed at the time of reading data from the memory cell, data of a selected memory cell is determined and the determined data is held in a data buffer. Then, whether or not all of the data buffers hold “0” data and whether or not all of the data buffers hold “1” data are both detected.
Jpn. Pat. Appin. KOKAI Publication No. 2004-310268 and Jpn. Pat. Appin. KOKAI Publication No. 2005-353171 propose a method for solving the problem by performing a process in the NAND flash memory.